STM32~ 配置时钟频率 [一文带你解决 STM32 主频配置],flutter 跳转到系统设置
第二步,修改 system_stm32f10x.c 中的时钟配置,先找到 void SystemInit(void)—》SetSysClock()—》SetSysClockTo72(),将 9 倍频改为 6 倍频,12*6=72MHz
/**
@brief Sets System clock frequency to 72MHz and configure HCLK, PCLK2
@note This function should be used only after reset.
@param None
@retval None
*/
static void SetSysClockTo72(void)
{
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
/* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/
/* Enable HSE */
RCC->CR |= ((uint32_t)RCC_CR_HSEON);
/* Wait till HSE is ready and if Time out is reached exit */
do
{
HSEStatus = RCC->CR & RCC_CR_HSERDY;
StartUpCounter++;
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
if ((RCC->CR & RCC_CR_HSERDY) != RESET)
{
HSEStatus = (uint32_t)0x01;
}
else
{
HSEStatus = (uint32_t)0x00;
}
if (HSEStatus == (uint32_t)0x01)
{
/* Enable Prefetch Buffer */
FLASH->ACR |= FLASH_ACR_PRFTBE;
/* Flash 2 wait state */
FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;
/* HCLK = SYSCLK */
RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
/* PCLK2 = HCLK */
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
/* PCLK1 = HCLK */
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2;
#ifdef STM32F10X_CL
// ...
#else
/* PLL configuration: PLLCLK = HSE * 9 = 72 MHz */
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE |
RCC_CFGR_PLLMULL));
RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL6); // 12
#endif /* STM32F10X_CL */
/* Enable PLL */
RCC->CR |= RCC_CR_PLLON;
/* Wait till PLL is ready */
while((RCC->CR & RCC_CR_PLLRDY) == 0)
{
}
/* Select PLL as system clock source */
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;
/* Wait till PLL is used as system clock source */
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08)
{
}
}
else
{ /* If HSE fails to start-up, the application will have wrong clock
configuration. User can add here so
me code to deal with this error */
}
}
参考:
3 . 内部 RC 作为时钟源
实际开发中使用内部 RC 振荡器主频不能达到 72,我使用的是 STM32F103C8T6,库函数最多支持 16 倍频也就是 8/2*16=64Mhz,实际测试芯片跑不起来功能没有正常工作。使用内部 RC 振荡最大能达到 52M,不信大家可以试验一下。
下面一篇博客中也提到类似问题:
在 system_STM32f10x.c 中,找到函数 void SystemInit (void){} 注释掉所有代码,添加下属代码。
//开启 HSI
RCC->CR |= (uint32_t)0x00000001;
//选择 HSI 为 PLL 的时钟源,HSI 必须 2 分频给 PLL
RCC->CFGR |= (uint32_t)RCC_CFGR_PLLSRC_HSI_Div2;
// 8/2 *13 = 52 8/2 *9 = 36 8/2 * 12,设置倍频
RCC->CFGR |= (uint32_t)RCC_CFGR_PLLMULL12;
//PLL 不分频
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